Ashing Technique For Nano-gap Fabrication of Electrostatic Transducers

Using a low temperature process flow, a photoresist ashing technique was developed to define nano-gaps for the fabrication of electrostatically transduced RF MEMS. This was performed by shrinking laterally the photoresist to the required dimension in a O2 plasma etch system. Polycrystalline silicon-germanium (poly-SiGe) films replaced poly silicon as the structural layer, while poly germanium was used as the sacrificial layer, rather than silicon dioxide. Electrostatic transducer structures were successfully fabricated with nano-gap dimensions ranging from 50nm to 150nm. Introduction During recent years, there has been extensive research and significant progress in the fabrication as well as testing of high frequency MEMS resonators. In the case of parallel plate electrostatic transducers, extending the resonant frequency of micromechanical resonators to the Gigahertz range often entails shrinking the gap spacing between the electrodes and the resonator. Gaps size of less than 100nm are required in order to reduce the motional resistance Req, hence minimizing the device insertion loss. Several fabrication methodologies have been previously demonstrated to achieve ultra small gaps in the sub-micron scale. E-beam lithography and sacrificial sidewall spacer techniques were used to achieve lateral electrode to resonator gaps of 100nm [1],[2]. Resist ashing was reported to be a convenient and useful technique to extend the lithography line width limit for sub-100nm and e-beam lithography [3]. It is generally used in semiconductor industry to define nanometer size length gate dimensions below conventional optical lithography limitations [4]-[5]. A standard lithographically defined procedure as compared for instance to a spacer lithography technology has the advantage of allowing the gap to be placed very specifically and the device to be built around it, as compared to a spacer lithography process. This yields a better resolution, larger design flexibility, and simplicity in the fabrication process In this work, photoresist (PR) ashing has been implemented, to define submicrometer gaps for the fabrication of RF transducers. A low temperature process flow, using SiGe technology, has been developed to pave the way for a modular integration of MEMS with standard CMOS electronics. Experimental Details Starting with a silicon substrate (Fig. 1a), 1 μm of silicon dioxide (SiO2) was grown in order to electrically isolate the fabricated structures from the substrate (Fig.1b). Sacrificial in-situ doped p+ poly Ge was then deposited in a conventional Low Pressure Chemical Vapor Deposition (LPCVD) furnace at 350oC, using GeH4 as the gaseous Ge source, and B2H6 as the dopant gas (Fig.1c). 2000 Angstroms of Low Temperature Oxide M8.23.1 Mat. Res. Soc. Symp. Proc. Vol. EXS-2 © 2004 Materials Research Society